The present invention relates to a method of forming a semiconductor structure, and particularly to a method of forming a semiconductor structure including a buried plate around a deep trench employing an alternating series of ion implantation and incremental extension of depth of the deep trench.
Deep trench capacitors are used in a variety of semiconductor chips for high areal capacitance and low device leakage. Typically, a deep trench capacitor provides a capacitance in the range from 4 fF (femto-Farad) to 120 fF. A deep trench capacitor may be employed as a charge storage unit in a dynamic random access memory (DRAM), which may be provided as a stand-alone semiconductor chip, or may be embedded in a system-on-chip (SoC) semiconductor chip. A deep trench capacitor may also be employed in a variety of circuit applications such as a charge pump or a capacitive analog component in a radio-frequency (RF) circuit.
Deep trench capacitors are formed in a semiconductor substrate, which can be a semiconductor-on-insulator (SOI) substrate or a bulk substrate. Other semiconductor devices such as field effect transistors can be formed on the same semiconductor substrate, thereby enabling embedding of deep trench capacitors into a semiconductor chip. Such embedded deep trench capacitors enable various functionality including embedded dynamic access memory (eDRAM) and other embedded electronic components requiring a capacitor.
As the size of an opening of a deep trench decreases scaling, the aspect ratio of the deep trench increases. Thus, formation of a buried plate by angled ion implantation into sidewalls of a deep trench becomes more difficult with the increase in the aspect ratio of the deep trench. There are two factors that render difficult formation of a buried plated by direct angled ion implantation into sidewalls of the deep trench. The first factor is that a high aspect ratio of the deep trench limits the amount of implanted ions that reach a lower portion of the deep trench. This is because even a small angular variation from normal incidence in the direction of the implanted ions tends to send the ions to the upper portion of the deep trench when the aspect ratio is high. The second factor is that a spacer to absorb implanted ions needs to be provided to protect a top semiconductor layer in an SOI substrate or a top portion of a bulk substrate during ion implantation. The spacer reduces the dimension of the opening in the upper portion of the deep trench, thereby limiting the ion implantation angle even more.
Methods of forming a buried plate without employing ion implantations as known in the art include gas phase doping, solid source doping, and depositing a metal plate. Such methods tend to employ complex processing schemes and costly to implement.